w1n5t0n/memlnaut-nisps
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memlnaut-nisps/vcv
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w1n5t0n e52b800a92 feat(vcv): complete Phase 2 — core engine wired up 
- IML<float> with [16,24,16] hidden layers as module member
- CV inputs read, clamped 0-10V, normalized to [0,1]
- MLP inference in process(), 12 outputs scaled to 0-10V
- SPREAD knob (0-1, default 0.6) controls weight initialization
- RAND button randomizes weights using current spread value
- Panel: knob + button + 2 inputs + 12 outputs in 2x6 grid
2026-03-28 00:38:58 +02:00
..
res feat(nisps-core,vcv): complete Phase 0 + Phase 1 2026-03-28 00:36:46 +02:00
src feat(vcv): complete Phase 2 — core engine wired up 2026-03-28 00:38:58 +02:00
Makefile feat(nisps-core,vcv): complete Phase 0 + Phase 1 2026-03-28 00:36:46 +02:00
plugin.json feat(nisps-core,vcv): complete Phase 0 + Phase 1 2026-03-28 00:36:46 +02:00
SPEC.md docs(vcv): third review — input ranges, CV modulation, lifecycle, smoke test 2026-03-28 00:22:43 +02:00