memlnaut-nisps/docs/specs
monkey-w1n5t0n 7a30da91a8 docs(recon): memllib usage inventory — the §7.5 prerequisite, with a wrinkle
Plan §5 names an inventory of the load-bearing memllib surface as the
prerequisite for the vendor-vs-fork-pin decision. Built it from the firmware
LINKER MAP rather than grep — the same method that would have caught daisysp
(S8) mechanically instead of by reading.

Result: all 24 compiled translation units contribute kept sections to the image;
no discarded-only TU exists. memllib is not a daisysp situation. "The
load-bearing subset" is ~1.8 MB across 84 files — essentially all of memllib
minus examples/. There is no small subset to lift; synth/ alone is 1.3 MB and
all three of its TUs link.

The wrinkle, which was not visible when §7.5 was decided: src/memllib is not a
third-party dependency, it is the LAB's shared library
(MusicallyEmbodiedML/memllib), and our fork is 3 commits ahead but 31 commits
BEHIND — +2034/-153 across exactly the files we link, including "new staticmlp",
"jolts", "noise", "verb". Vendoring as-is freezes that gap permanently.

Recommendation recorded: rebase the three small NISPS commits onto upstream main
FIRST, then vendor. Same self-contained end state, but it does not silently
discard work that sounds directly relevant, and it is the only moment that merge
is cheap — after vendoring there is no upstream history to merge against.

Flagged for an operator call before the PlatformIO cut, which this gates.
2026-07-21 14:12:55 +02:00
..
_archive docs(ergo): update task guidance 2026-07-13 22:58:26 +02:00
plans docs(recon): memllib usage inventory — the §7.5 prerequisite, with a wrinkle 2026-07-21 14:12:55 +02:00
recon docs(recon): memllib usage inventory — the §7.5 prerequisite, with a wrinkle 2026-07-21 14:12:55 +02:00
aimmersive-clone-spec.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
backends-spec.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
dock-spec.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
engine-architecture.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
feedback-modes-port-spec.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
inputs-spec.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
MAIN.md docs(audit): simplification audit 2026-07 — recon findings, phased plan, ALIGNMENT rewrite 2026-07-21 01:24:35 +02:00
manifold-parity-features-spec.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
slp-workshop-firmware.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
useq-cv-protocol.md docs: restructure design docs into docs/specs (adr/plans/recon), update path references 2026-07-13 23:15:46 +03:00
vcv-module.md feat(vcv): reunify module onto core MLP — thin iml.hpp adapter (P6) 2026-07-18 13:01:28 +02:00